1

KnapSim - Run-time efficient hardware-software partitioning technique for FPGAs
Rapid estimation of DSPs utilization for efficient high-level synthesis
Real-Time Image Resizing Hardware Accelerator for Object Detection Algorithms
Area-Time Estimation of C-based Functions for Design Space Exploration
Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration
Performance estimation framework for FPGA-based processors